EP1S20B672C6 vs EP1S20F672C6 比較
詳細並排比較 EP1S20B672C6 由 Intel 與 EP1S20F672C6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S20B672C6 | EP1S20F672C6 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | Stratix | Stratix (first generation) |
| Manufacturer | Intel (formerly Altera) | Altera (now Intel) |
| Logic Elements | 18,460 | — |
| Embedded Memory Bits | 1,669,248 | 1,669,248 |
| User I/O Count | 426 | — |
| 封裝 | 672-ball FineLine BGA (672-BBGA) | 672-ball FineLine BGA |
| Package Dimensions | 35 mm x 35 mm | — |
| Ball Pitch | 1.27 mm | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Speed Grade | C6 | C6 |
| 工作溫度 | 0 C to 85 C (commercial) | 0°C to +85°C (Commercial) |
| Maximum Internal Frequency | 450.05 MHz | — |
| Logic Family | CMOS | — |
| Configuration Method | PS / PPS / PPA / JTAG | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 18,460 |
| Logic Array Blocks (LABs) | — | 1,846 |
| Maximum User I/Os | — | 426 |
| Package Code | — | F672 |
| 供應電壓 | — | Core 1.5 V, I/O programmable |
| 安裝類型 | — | Surface Mount |