EP1S25F672C8 vs EP1S25F672C5N 比較
詳細並排比較 EP1S25F672C8 由 Intel 與 EP1S25F672C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S25F672C8 | EP1S25F672C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| User I/Os | 473 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V (nominal) |
| Maximum Operating Frequency | 357.14 MHz | — |
| 封裝 | 672-ball FineLine BGA (FBGA) | — |
| Package Dimensions | 35 x 35 mm, 1.27 mm pitch | — |
| Speed Grade | C8 (commercial, -8) | C5 |
| 工作溫度 | 0 C to +85 C (commercial) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| MSL 等級 | [DATA_NEEDED: MSL Level] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS Status] | Compliant |
| Logic Family | CMOS | — |
| Configuration Method | JTAG / Altera configuration device | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel |
| Series | — | EP1S25 |
| Logic Elements (Cells) | — | 25,660 |
| Number of CLBs | — | 2,566 |
| Number of Logic Cells / Gates | — | [DATA_NEEDED: total system gates] |
| Maximum Internal Frequency | — | 500 MHz |
| Number of I/O Pins | — | 473 user I/O |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Package Type | — | FineLine BGA (FBGA) |
| Package Pin Count | — | 672 |
| Ball Pitch | — | 1.00 mm |
| 工作溫度範圍 | — | 0 °C to +85 °C (commercial) |
| Lead-Free (Pb-Free) | — | Yes (suffix "N") |