EP1S40B956C6 vs EP1S30B956C6 比較
詳細並排比較 EP1S40B956C6 由 Intel 與 EP1S30B956C6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S40B956C6 | EP1S30B956C6 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements / Cells | 41,250 | — |
| Logic Array Blocks (LABs) | 4,125 | 3,247 |
| CLB Equivalents / Registers | 46,970 | — |
| User I/O Pins | 683 | — |
| 封裝 | BGA-956 (956-BBGA, FCBGA) | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch |
| Package Size | 40 x 40 mm | — |
| Ball Pitch | 1.27 mm | — |
| Speed Grade | 6 (commercial, slowest) | C6 |
| Core Supply Voltage | 1.5 V | — |
| 工作溫度 | 0C to 85C | 0 C to 85 C (Commercial) |
| Logic Family | CMOS | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Process Technology | 0.13 um CMOS | 130 nm CMOS |
| Embedded Memory | TriMatrix (M512, M4K, M-RAM blocks) | — |
| DSP Blocks | Embedded multiplier blocks | Yes (Stratix DSP blocks) |
| PLLs | Multiple phase-locked loops | Up to 12 |
| Lead-Free / RoHS | Per Altera/Intel datasheet | — |
| Logic Elements (LEs) | — | 32,470 |
| Embedded Memory Bits | — | 3,317,184 (approximately 3.4 Mbit) |
| Maximum User I/O | — | 683 |
| Core Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Frequency | — | 450.05 MHz (per family datasheet) |
| Configuration Modes | — | Passive Serial (PS), Passive Parallel (PP), JTAG |
| RoHS 狀態 | — | Not confirmed - pre-RoHS part |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | Unknown |