EP1S40B956C6 vs EP1S40B956C6N 比較
詳細並排比較 EP1S40B956C6 由 Intel 與 EP1S40B956C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S40B956C6 | EP1S40B956C6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Stratix | Altera Stratix (1st generation) |
| Logic Elements / Cells | 41,250 | — |
| Logic Array Blocks (LABs) | 4,125 | 4,125 |
| CLB Equivalents / Registers | 46,970 | — |
| User I/O Pins | 683 | — |
| 封裝 | BGA-956 (956-BBGA, FCBGA) | 956-ball FineLine BGA (FCBGA) |
| Package Size | 40 x 40 mm | — |
| Ball Pitch | 1.27 mm | 1.27 mm |
| Speed Grade | 6 (commercial, slowest) | C6 (commercial, mid-speed) |
| Core Supply Voltage | 1.5 V | — |
| 工作溫度 | 0C to 85C | 0 °C to +85 °C (Commercial) |
| Logic Family | CMOS | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Process Technology | 0.13 um CMOS | 0.13 µm CMOS |
| Embedded Memory | TriMatrix (M512, M4K, M-RAM blocks) | 3,423,744 bits (~3.4 Mbit) |
| DSP Blocks | Embedded multiplier blocks | — |
| PLLs | Multiple phase-locked loops | — |
| Lead-Free / RoHS | Per Altera/Intel datasheet | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 41,250 |
| Maximum User I/O | — | 683 |
| 供應電壓 | — | 1.425 V to 1.575 V (1.5 V nominal) |
| Package Dimensions | — | 40 mm x 40 mm |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Active Serial |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance] |