EP1S40B956C6N vs EP1S30B956C6 比較

詳細並排比較 EP1S40B956C6N 由 Intel 與 EP1S30B956C6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1S40B956C6N EP1S30B956C6
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series Stratix —
Family Altera Stratix (1st generation) Stratix
Process Technology 0.13 µm CMOS 130 nm CMOS
Logic Elements (LEs) 41,250 32,470
Logic Array Blocks (LABs) 4,125 3,247
Embedded Memory 3,423,744 bits (~3.4 Mbit) —
Maximum User I/O 683 683
供應電壓 1.425 V to 1.575 V (1.5 V nominal) —
工作溫度 0 °C to +85 °C (Commercial) 0 C to 85 C (Commercial)
封裝 956-ball FineLine BGA (FCBGA) 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch
Package Dimensions 40 mm x 40 mm —
Ball Pitch 1.27 mm —
Speed Grade C6 (commercial, mid-speed) C6
Configuration Interface JTAG (IEEE 1149.1), Passive Serial, Active Serial —
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS compliance] Not confirmed - pre-RoHS part
Embedded Memory Bits — 3,317,184 (approximately 3.4 Mbit)
Core Voltage (VCCINT) — 1.5 V
Maximum Internal Frequency — 450.05 MHz (per family datasheet)
DSP Blocks — Yes (Stratix DSP blocks)
PLLs — Up to 12
Configuration Modes — Passive Serial (PS), Passive Parallel (PP), JTAG
Lead-Free — Unknown

資料表與資源

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