EP1S60F1020I6N vs EP1S60F1020C7 比較

詳細並排比較 EP1S60F1020I6N 由 Altera 與 EP1S60F1020C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

Altera

EP1S60F1020I6N - Stratix FPGA 57K LE, 773 I/O, 1020-FBGA | Altera

EP1S60F1020I6N Nrnd

Altera

EP1S60F1020C7 Obsolete

參數	EP1S60F1020I6N	EP1S60F1020C7
品牌	Altera	Altera
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	NRND	Obsolete
Series	Stratix	Stratix
Family	Stratix FPGA (1st generation)	Stratix (EP1S60)
Logic Elements (LEs)	57,120	—
Logic Array Blocks (LABs)	5,712	—
Logic Cells	6,570	—
Total RAM Bits	5,215,104	—
User I/O Count	773	—
工作溫度範圍	0°C to 85°C (I6 grade)	—
供應電壓	1.425 V to 1.575 V (1.5 V nominal core)	—
Process Node	0.13 µm CMOS	—
封裝	1020-FBGA (33 x 33 mm, 1.0 mm pitch)	1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch
Speed Grade	6	7
Temperature Grade	I (Industrial)	—
安裝類型	Surface Mount (BGA)	Surface Mount
MSL 等級	[DATA_NEEDED: MSL level]	3 (per BGA moisture-sensitivity norms)
RoHS 狀態	Compliant	Compliant (lead-free)
Logic Elements	—	57,120
Total Memory Bits	—	5,215,104
Maximum User I/O	—	773
Logic Family	—	CMOS
工作溫度	—	0C to +85C (Commercial)
Core Supply Voltage	—	1.5 V
Logic Cells / Logic Blocks	—	6,570 (per datasheet Section I nomenclature)
DSP Blocks	—	Embedded dedicated multiplier / adder blocks
PLLs	—	Up to 12 enhanced PLLs per die
Configuration Method	—	Serial or parallel with optional decompression