EP1S80F1020C7 vs EP1S80F1020C5N 比較

詳細並排比較 EP1S80F1020C7 由 Altera 與 EP1S80F1020C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP1S80F1020C5N EP1S80F1020C5N - 79,040 Logic Elements FPGA | Intel

EP1S80F1020C5N - 79,040 Logic Elements FPGA | Intel

EP1S80F1020C5N ✗ 停產

規格比較

參數 EP1S80F1020C7 EP1S80F1020C5N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 停產終止
Series Stratix —
Logic Elements 79,040 79,040
System Gates (typical) 7,427,520 —
Logic Array Blocks (LABs) 7,904 —
User I/O Pins 773 773 I/O
Total Package Pins 1020 (ball) —
Package Type FBGA-1020 (33 x 33 mm, 1 mm pitch) FBGA-1020
Core Supply Voltage (VCCINT) 1.425 V to 1.575 V —
工作溫度 0 C to 85 C (Commercial) 0 °C to 85 °C
Logic Family CMOS, SRAM-based configuration —
Process Technology 1.5 V, 0.13 um CMOS —
Configuration Modes Passive Serial (PS), Fast Passive Parallel (FPP), JTAG —
PLLs 12 (per datasheet family) —
Memory TriMatrix embedded SRAM blocks —
DSP Blocks Dedicated hardware multipliers/accumulators —
安裝類型 Surface Mount (BGA) Surface Mount
RoHS 狀態 Compliant (lead-free FBGA) unknown
Product Type — Field Programmable Gate Array (FPGA)
Device Family — Stratix
Logic Technology — CMOS
Logic Cells — 9,191
Logic Array Blocks — 7,904
Total Package Pins or Balls — 1,020
Package Dimensions — 33 mm x 33 mm
Ball Pitch — 1 mm
供應電壓 — [DATA_NEEDED: operating supply voltage]
Speed Grade — C5
REACH Status — unknown
AEC-Q100 Qualification — not_applicable
Embedded Memory Capacity — [DATA_NEEDED: embedded memory capacity]
Phase-Locked Loops — [DATA_NEEDED: PLL count]
Transceiver Count — [DATA_NEEDED: transceiver count]

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