EP1SGX25DF1020C6ESL vs EP1SGX25DF1020C6B 比較
詳細並排比較 EP1SGX25DF1020C6ESL 由 Altera 與 EP1SGX25DF1020C6B 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL Obsolete規格比較
| 參數 | EP1SGX25DF1020C6ESL | EP1SGX25DF1020C6B |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Stratix GX | EP1SGX25 |
| Logic Elements | 25,660 | 25,660 |
| Total RAM Bits | 1,944,576 bits | — |
| User I/O Pins | 607 | — |
| LABs/CLBs | 2,566 | — |
| 封裝 | 1020-BBGA (FineLine BGA) | 1020-BBGA (33 × 33 mm, 1.0 mm pitch) |
| Core Voltage | 1.5 V | — |
| 工作接面溫度 | 0 C to 85 C | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Process Node | 0.13 um CMOS | — |
| Transceivers | Embedded multi-gigabit transceivers (per Stratix GX family) | Embedded high-speed serial transceivers (multi-gigabit) |
| DSP Blocks | Yes (embedded DSP blocks) | Hardware multipliers / DSP blocks |
| Speed Grade | C6 | C6 |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) | — |
| Series | — | Stratix GX |
| Total Memory Bits | — | 1,944,576 |
| User I/O Count | — | 607 |
| Supply Voltage (Core) | — | 1.5 V |
| 工作溫度 | — | 0 °C to 85 °C (Commercial) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | Yes (per DigiChip package note) |
| PLLs | — | On-chip phase-locked loops for clock management |
| External Memory Support | — | DDR, DDR2, SDR, QDR, QDRII SRAM |
| Hard IP | — | PCI Express (per Stratix GX family) |