EP1SGX25DF1020I6N vs EP1SGX40DF1020I6N 比較

詳細並排比較 EP1SGX25DF1020I6N 由 Intel 與 EP1SGX40DF1020I6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX25DF1020I6N EP1SGX40DF1020I6N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 啟用中
Family Stratix GX Stratix (First Generation)
Series EP1SGX25 Stratix GX
Logic Elements 25,660 —
Configurable Logic Blocks (CLBs) 2,566 —
User I/Os 607 —
Maximum Operating Frequency [DATA_NEEDED: max internal clock frequency in MHz] —
Process Technology 130 nm CMOS —
Core Supply Voltage 1.425 V to 1.575 V (1.5 V nominal) 1.425 V to 1.575 V (1.5 V nominal)
Multi-Gigabit Transceivers Integrated (up to 3.125 Gbps per channel) —
封裝 1020-ball FC-FBGA, 33 mm × 33 mm, 1.0 mm pitch —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
Lead Finish Lead Free —
工作溫度 0 °C to +85 °C (industrial) 0 C to 85 C (industrial grade 'I')
MSL 等級 [DATA_NEEDED: moisture sensitivity level] [DATA_NEEDED: MSL rating]
RoHS 狀態 Compliant [DATA_NEEDED: confirm RoHS on datasheet]
Memory Embedded TriMatrix memory blocks —
DSP Blocks Integrated DSP blocks for fixed/floating-point arithmetic —
Clock Management PLLs with dynamic phase alignment (DPA) —
Grade Identifier I6 (industrial, speed grade 6) —
Manufacturer Intel (formerly Altera) Intel (formerly Altera)
Number of Logic Elements (LEs) — 41,250
Number of LABs (Logic Array Blocks) — 4,125
Total RAM Bits — 3,423,744
Maximum User I/O Pins — 624
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
High-Speed Transceivers — Integrated GX SerDes (channels, data rate: [DATA_NEEDED: per Stratix GX handbook])
Embedded DSP Blocks — Yes (DSP block count: [DATA_NEEDED: per device datasheet])
封裝 / 外殼 — 1020-BBGA / 1020-FBGA
Package Size — 33 x 33 mm, 1.0 mm pitch
Supplier Device Package — 1020-FBGA (33 x 33)
Speed Grade — 6 (I6)
Logic Family — CMOS (SRAM-based configuration)
Packaging — Tray / Bulk
Configuration Mode — Passive Serial / Fast Passive Parallel / JTAG (per Stratix GX handbook)

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