EP1SGX25DF800I6N vs EP1SGX25CF672I6 比較

詳細並排比較 EP1SGX25DF800I6N 由 Intel 與 EP1SGX25CF672I6 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX25DF800I6N EP1SGX25CF672I6
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family Stratix GX Stratix GX
Logic Elements [DATA_NEEDED: logic element count] 25,660
Transceiver Channels 4 to 20 channels —
Maximum Transceiver Data Rate 3.1875 Gbps per channel —
CDR / SERDES Embedded clock-data recovery and SERDES —
Memory TriMatrix memory, up to 2 Mbits —
DSP Blocks Up to 22 DSP blocks [DATA_NEEDED: DSP block count per Stratix GX device data sheet]
Hard IP PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) —
Source-Synchronous Channels 8 channels —
I/O Standards LVDS, LVTTL, LVCMOS, SSTL, HSTL —
封裝 800-pin FineLine BGA (DF800) 672-ball FBGA (27 x 27 mm, 1 mm pitch)
Speed Grade -6 (production grade) —
Temperature Range Industrial -40C to +100C —
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant (lead-free FBGA)
Protocol Support Gigabit Ethernet, SONET/SDH, PCI Express, custom serial —
Logic Array Blocks (LABs) — 2,566
Total RAM Bits — 1,944,576
User I/O Pins — 455
Core Supply Voltage — 1.425 V to 1.575 V (1.5 V typical)
Process Technology — 130 nm CMOS
Internal Clock Performance — Up to 5000 MHz
安裝類型 — Surface Mount
工作接面溫度 — -40C to +100C
Transceiver Count — [DATA_NEEDED: precise number of SERDES channels per pin list]
Lead-Free — Yes

資料表與資源

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