EP1SGX25DF800I7N vs EP1SGX25DF800C5N 比較

詳細並排比較 EP1SGX25DF800I7N 由 Intel 與 EP1SGX25DF800C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX25DF800I7N EP1SGX25DF800C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Series Stratix GX —
Family Name Stratix GX (EP1SGX25) —
Logic Elements 25,660 —
Registers 26,274 —
Embedded Memory 1,944,576 bits —
GXB Transceiver Channels 16 (max) —
GXB Data Rate Up to 3.125 Gbps per channel —
I/O Pins [DATA_NEEDED: I/O pin count] —
Core Voltage (VCCINT) 1.5 V —
I/O Standards Supported LVDS, LVTTL, LVPECL, PCI, PCI-X, SSTL, HSTL, 1.5 V PCML/PECL —
PLLs Up to 12 Up to 40 (device-wide)
封裝 FBGA-800 (FineLine BGA) FBGA-800 (FineLine BGA, 31x31 mm)
安裝類型 Surface Mount Surface Mount (BGA)
工作溫度 -40C to +100C (industrial, 'I' grade) 0C to +85C (commercial)
Speed Grade -7 (industrial) C5 (commercial)
Configuration JTAG or Passive Serial (EPCSxx) —
RoHS 狀態 [DATA_NEEDED: RoHS status not in verified data] —
Family — Stratix GX
Device Logic Elements — 25,660 (typical)
Transceiver Channels — 8 (full-duplex)
Maximum Transceiver Data Rate — 3.1875 Gbps per channel
Process Technology — 130 nm
Supply Voltage (Core) — 1.5 V typical
Lead-Free / RoHS Status — Lead-free (N suffix)
On-Chip Memory (TriMatrix) — Approx. 2 Mbits total
Embedded 8b/10b Encoder/Decoder — Yes (one per transceiver channel)
PCI Express Hard IP — x1, x4 endpoints supported
DSP Blocks — Embedded multiplier blocks (family-wide)
MSL 等級 — [DATA_NEEDED: MSL Level]
Development Software — Quartus II (legacy)

資料表與資源

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