EP1SGX40DF1020I5N vs EP1SGX40DF1020I6N 比較
詳細並排比較 EP1SGX40DF1020I5N 由 Altera 與 EP1SGX40DF1020I6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX40DF1020I5N - Stratix GX FPGA 41,250 Cells FBGA-1020 | Altera
EP1SGX40DF1020I5N Obsolete
規格比較
| 參數 | EP1SGX40DF1020I5N | EP1SGX40DF1020I6N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | Stratix GX | Stratix (First Generation) |
| Series | EP1SGX40 | Stratix GX |
| Logic Cells | 41,250 | — |
| Configurable Logic Blocks (CLBs) | 4,125 | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | 1.425 V to 1.575 V (1.5 V nominal) |
| 封裝 | FC-FBGA-1020, 33 x 33 mm, 1.0 mm pitch | — |
| Number of Pins / Balls | 1020 | — |
| Logic Family | CMOS | CMOS (SRAM-based configuration) |
| 工作溫度 | 0 C to 85 C | 0 C to 85 C (industrial grade 'I') |
| Temperature Grade (suffix) | Military / Industrial (I grade) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Form of Terminal | Ball (BGA) | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Embedded Memory | TriMatrix memory blocks | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm RoHS on datasheet] |
| Manufacturer | — | Intel (formerly Altera) |
| Number of Logic Elements (LEs) | — | 41,250 |
| Number of LABs (Logic Array Blocks) | — | 4,125 |
| Total RAM Bits | — | 3,423,744 |
| Maximum User I/O Pins | — | 624 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| High-Speed Transceivers | — | Integrated GX SerDes (channels, data rate: [DATA_NEEDED: per Stratix GX handbook]) |
| Embedded DSP Blocks | — | Yes (DSP block count: [DATA_NEEDED: per device datasheet]) |
| 封裝 / 外殼 | — | 1020-BBGA / 1020-FBGA |
| Package Size | — | 33 x 33 mm, 1.0 mm pitch |
| Supplier Device Package | — | 1020-FBGA (33 x 33) |
| Speed Grade | — | 6 (I6) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Packaging | — | Tray / Bulk |
| Configuration Mode | — | Passive Serial / Fast Passive Parallel / JTAG (per Stratix GX handbook) |