EP20K1000CF33C8ES vs EP20K1000CF33C9ES 比較

詳細並排比較 EP20K1000CF33C8ES 由 Intel 與 EP20K1000CF33C9ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K1000CF33C9ES EP20K1000CF33C9ES - APEX-20KC FPGA 1M Gates 38400 LE 1020-FBGA

EP20K1000CF33C9ES - APEX-20KC FPGA 1M Gates 38400 LE 1020-FBGA

EP20K1000CF33C9ES ⚠ 最後購買機會

規格比較

參數 EP20K1000CF33C8ES EP20K1000CF33C9ES
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Series APEX 20KC —
Family APEX (Advanced Programmable Embedded Matrix) APEX-20KC
System Gates 1,000,000 —
Logic Elements / Cells 38,400 —
Embedded Memory Bits 327,680 —
Maximum User I/O 708 —
封裝 1020-ball FC-FBGA (Flip-Chip Fine-pitch BGA) 1,020-ball FineLine BGA (FBGA)
安裝類型 Surface Mount (BGA) —
Core Supply Voltage 1.8 V —
Process Technology 0.15 µm CMOS 0.18 um CMOS
Maximum Toggle Frequency 301.21 MHz —
Speed Grade C8 (Commercial) C9
Architecture MultiCore (LUT + Embedded System Blocks) —
Number of PLLs 4 —
工作溫度 0 °C to +85 °C (Commercial) 0 C to +85 C (commercial)
Programming Interface JTAG (IEEE 1149.1) - serial via Altera Quartus —
Embedded System Blocks (ESBs) Dual-port RAM / ROM / CAM 212
RoHS 狀態 unknown [DATA_NEEDED: RoHS compliance status]
Lead-Free unknown [DATA_NEEDED: lead-free finish status]
Manufacturer — Intel (formerly Altera)
Typical Gate Count — 1,000,000 system gates
Logic Elements — 38,400
Logic Array Blocks (LABs) — 3,840
Total Embedded RAM Bits — 327,680 bits
Maximum User I/O Pins — 708
Logic Element Architecture — 4-input LUT with dedicated carry chain
Maximum Embedded RAM per ESB — 32,768 bits (dual-port, FIFO support)
Phase-Locked Loops — Up to 4 enhanced PLLs
MultiVolt I/O Support — 1.8V / 2.5V / 3.3V / 5.0V
JTAG Support — IEEE 1149.1 boundary-scan
Configuration Method — Passive serial / Passive parallel / JTAG

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