EP20K100EFC324-1N vs EP20K30EFC324-1X 比較
詳細並排比較 EP20K100EFC324-1N 由 Altera 與 EP20K30EFC324-1X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K30EFC324-1X - APEX 20KE FPGA, 30K Gates, 324-BGA | Intel / Altera
EP20K30EFC324-1X Obsolete規格比較
| 參數 | EP20K100EFC324-1N | EP20K30EFC324-1X |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX-20KE | APEX-20K® (MultiCore™ architecture) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements (LEs) | 4160 | 1,200 |
| Typical Gates | 100,000 | — |
| Maximum User I/O | 246 | 128 |
| Embedded System Blocks (ESBs) | 53248 bits | — |
| 封裝 | 324-BGA (FineLine BGA) | 324-ball FBGA (FineLine BGA), 19x19 mm |
| 工作溫度 | 0 C to 85 C | — |
| Propagation Delay | 1.6 ns | — |
| Internal Operating Frequency | 250 MHz | — |
| Core Voltage | 1.8 V | — |
| I/O Standard Support | LVDS, SSTL, HSTL, LVTTL, LVCMOS | LVDS, LVTTL, LVCMOS, PCI, SSTL |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.22 µm CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Technology | SRAM-based (volatile, requires configuration device) | — |
| MultiVolt I/O | 1.8 V core with 3.3 V / 5.0 V I/O support | — |
| Series | — | APEX 20KE |
| Typical Gate Count | — | 30,000 gates |
| Embedded Memory (RAM bits) | — | 24,576 |
| Dedicated Inputs | — | 4 |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Logic Delay (tPD) | — | 1.91 ns |
| 最大時脈頻率 | — | 909 MHz (internal), 160 MHz (I/O per partstack summary) |
| 安裝類型 | — | Surface Mount |
| Configuration Method | — | Passive Serial, JTAG, Fast Passive Parallel |
| PLLs | — | 4 |
| RoHS 狀態 | — | Compliant |
| Operating Temperature Grade | — | Commercial (0 °C to +85 °C) per package suffix interpretation; industrial on -1X grade [DATA_NEEDED: exact Tj range] |