EP20K100FC324-1V vs EP20K100FC324-3 比較
詳細並排比較 EP20K100FC324-1V 由 Intel 與 EP20K100FC324-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K100FC324-1V | EP20K100FC324-3 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20K® | APEX 20K |
| Number of Logic Elements / Cells | 4160 | — |
| Total RAM Bits | 53248 | — |
| Number of Gates (typical) | 100000 | — |
| Number of I/O | 252 | — |
| Number of LABs/CLBs | [DATA_NEEDED: number of Logic Array Blocks] | — |
| Number of EABs | [DATA_NEEDED: number of Embedded Array Blocks] | — |
| Supply Voltage - Core (VCCINT) | 2.375 V to 2.625 V | — |
| Supply Voltage - I/O (VCCIO) | 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) | — |
| Speed Grade | -1V (commercial) | -3 (slowest) |
| 工作溫度 | 0C to +85C (commercial) | 0 °C to 85 °C (Commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| 封裝 / 外殼 | 324-FBGA (FineLine BGA, 19x19 mm) | — |
| Supplier Device Package | 324-FBGA | — |
| Number of PLLs | 4 | — |
| I/O Standards Supported | LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Programming Interface | JTAG (IEEE 1149.1) / in-system | IEEE 1149.1 JTAG |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Family | — | APEX 20K (non-KE) |
| System Gates | — | 100,000 |
| Logic Elements | — | 4,160 |
| Maximum Logic Blocks | — | 26 |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 252 |
| Total RAM bits | — | 53,248 |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| Maximum Internal Frequency | — | 167 MHz |
| Propagation Delay | — | 1.6 ns |
| 封裝 | — | 324-pin FBGA (Fine-pitch BGA) |
| Package Body Size | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |