EP20K200CF484I9N vs EP20K200CF484C9N 比較

詳細並排比較 EP20K200CF484I9N 由 Altera 與 EP20K200CF484C9N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K200CF484I9N EP20K200CF484C9N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family APEX 20KC APEX 20KC
Logic Elements / Cells 8,320 —
Maximum Gates 200,000 —
Maximum Internal Frequency 250 MHz —
Process Technology 0.15 µm CMOS 0.15 um CMOS
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) —
封裝 484-pin FBGA (PBGA484), 1.0 mm pitch 484-pin FineLine BGA (FBGA)
User I/O Count 376 (368 user I/O + 4 dedicated inputs) —
Speed Grade I9 (industrial, highest-performance bin) C9 (250 MHz)
工作溫度 [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade] —
Programmable I/O Standards LVTTL, LVCMOS, PCI —
Configuration Interface JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial —
On-chip Memory Embedded System Blocks (ESBs) for distributed RAM/ROM —
Lead-Free (Pb-free) Yes (N suffix) —
RoHS 狀態 Compliant Compliant
Device Type — FPGA (Field-Programmable Gate Array)
Typical Gates — 200,000
Logic Elements — 8,320
Embedded System Block (ESB) Bits — 106,496
Maximum User I/O — 376
最大時脈頻率 — 250 MHz
Core Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt)
Temperature Grade — Industrial (0C to +85C)
安裝類型 — Surface Mount (BGA)
Configuration Scheme — SRAM-based, supports passive serial/parallel and JTAG
MSL 等級 — 3 (per JEDEC J-STD-020)

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