EP20K200EBC356-1 vs EP20K200EBC356-2 比較
詳細並排比較 EP20K200EBC356-1 由 Altera 與 EP20K200EBC356-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200EBC356-1 | EP20K200EBC356-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20K (APEX 20KE) | APEX 20K (APEX 20KE enhancement) |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Maximum User I/Os | 277 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Process Technology | 0.22 µm CMOS | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Internal Performance | Up to 367 MHz | — |
| 封裝 | 356-ball LBGA (35 x 35 mm) | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| 工作溫度 | 0 °C to 85 °C (Commercial) | 0 C to 85 C (commercial) |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| On-chip Memory | Embedded System Blocks (ESB / SRAM) | — |
| Configuration Method | JTAG (ByteBlaster / MasterBlaster), passive serial | — |
| Development Software | Altera Quartus II | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status not stated in verified sources] | — |
| 生命週期狀態 | Obsolete / EOL | — |
| Series | — | APEX 20KE |
| Typical Gates | — | 200,000 |
| Maximum Logic Elements | — | 8320 |
| Macros / Logic Cells | — | 832 |
| Maximum Flip-Flops | — | 13,824 |
| Embedded RAM | — | 53,248 bits |
| User I/Os | — | 271 |
| Number of Terminals / Pins | — | 356 (LBGA) |
| 供應電壓 | — | 2.5 V (core) |
| Logic Family | — | CMOS |
| Number of PLLs | — | 4 embedded PLLs |
| Number of DDR Interfaces | — | 4 |
| Package Type | — | 356-LBGA (EBC suffix) |
| Speed Grade | — | -2 |
| Compliance | — | RoHS status [DATA_NEEDED: RoHS] |