EP20K200EBC652-3 vs EP20K200EBC652-3N 比較

詳細並排比較 EP20K200EBC652-3 由 Intel 與 EP20K200EBC652-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K200EBC652-3 EP20K200EBC652-3N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX-20KE —
Logic Elements (LEs) 8,320 —
Logic Array Blocks (LABs) 832 832
Total RAM Bits 106,496 —
Maximum User I/O Pins 376 —
Embedded System Blocks (ESBs) Yes (dual-port RAM / ROM / CAM) —
PLLs 4 —
封裝 652-ball FineLine BGA (top-side, 1.27 mm pitch) 652-ball BGA
安裝類型 Surface Mount Surface Mount
工作溫度 0C to +85C (EBC - Enhanced Commercial) —
Speed Grade -3 -3 (slowest in APEX 20KE family)
Configuration Mode JTAG / PS / Passive-serial / Passive-parallel —
Process Node [DATA_NEEDED: process node] —
Core Voltage [DATA_NEEDED: core voltage] —
RoHS 狀態 Not RoHS (non-lead-free variant) Compliant
生命週期狀態 Obsolete - last time-buy period closed —
Series — APEX 20KE (APEX-20KE®)
Device Family — EP20K200
System Gates — 200,000
Logic Elements / Cells — 8,320
Macrocells — 832
Embedded RAM — 106,496 bits
User I/Os (DigiKey listing) — 376
User I/Os (digchip listing) — 277
Propagation Delay — 2.33 ns
Internal Frequency (max) — 189 MHz
Process Technology — 0.22 µm CMOS
Core Supply Voltage — 1.71 V to 1.89 V (nominal 1.8 V)
I/O Supply (LVDS-capable) — LVDS, 2.5 V referenced (per source variant)
Operating Temperature (TJ) — 0 °C to 85 °C (commercial)
Configuration — JTAG (IEEE 1149.1), Passive Serial

資料表與資源

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