EP20K200EQC240-3N vs EP20K300EQC240-3 比較

詳細並排比較 EP20K200EQC240-3N 由 Altera 與 EP20K300EQC240-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K200EQC240-3N EP20K200EQC240-3N - APEX 20KE FPGA 8,320 LE | Altera

EP20K200EQC240-3N - APEX 20KE FPGA 8,320 LE | Altera

EP20K200EQC240-3N Obsolete

規格比較

參數 EP20K200EQC240-3N EP20K300EQC240-3
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX-20KE —
Number of Logic Elements/Cells 8320 —
Number of Gates 200000 —
Total RAM Bits 106496 bits —
Number of User I/Os 168 —
Voltage - Supply 1.71V ~ 1.89V —
Core Supply Voltage 1.8 V nominal —
Maximum Internal Frequency 189 MHz common -3 speed listing —
Speed Grade -3 -3
工作溫度 0 to 85 C 0C to +85C (commercial)
封裝 / 外殼 240-BQFP —
Supplier Device Package 240-PQFP (32x32) —
安裝類型 Surface Mount Surface Mount
Technology CMOS —
Process Technology 0.22 um 0.22 um CMOS
Configuration Type SRAM-based, external configuration required —
生命週期狀態 Obsolete / legacy distribution via Rochester Electronics —
I/O Standards Supported [DATA_NEEDED: I/O standards from APEX-20KE datasheet] —
Configuration Bitstream Size [DATA_NEEDED: exact configuration file size for EP20K200E] —
Thermal Resistance (theta_JA) [DATA_NEEDED: thermal resistance for 240-BQFP] —
RoHS 狀態 Unknown; N suffix often indicates Pb-free finish but not confirmed in verified snippets [DATA_NEEDED: confirm for this date code]
Family — APEX-20KE
Typical Gates — 300,000
Logic Elements / Cells — 11,520
Embedded Memory (bits) — 147,456
Maximum User I/O — 152
Number of PLLs — 4
Core Voltage (VCCINT) — 1.8 V
I/O Voltage Tolerance — 2.5V / 3.3V / 5.0V compatible
封裝 — 240-pin PQFP / BFQFP (240-BFQFP)
Pin Pitch — 1.0 mm
Terminal Form — Gull Wing
Programmable Logic Type — Loadable PLD
Architecture — MultiCore (LUT + Embedded System Blocks)
Configuration Interface — JTAG (IEEE 1149.1), passive serial

資料表與資源

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