EP20K400CB652I7 vs EP20K400CB652C9ES 比較

詳細並排比較 EP20K400CB652I7 由 Altera 與 EP20K400CB652C9ES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CB652I7 EP20K400CB652C9ES
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Family APEX 20KC APEX 20KC
Device Family Field-Programmable Gate Array (FPGA) —
Typical Gates 400,000 —
Logic Elements (LEs) 16,640 —
Maximum Operating Frequency 375.94 MHz 250 MHz
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage 1.8 V —
I/O Supply Voltage 1.8 V / 3.3 V —
封裝 BGA-652 (652-ball) —
Package Code (JESD-30) S-PBGA-B652 —
Terminal Form Ball —
Package Shape Square —
Maximum User I/O Pins [DATA_NEEDED: max user I/O] —
Embedded Memory Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM —
Configuration Method SRAM + JTAG (ISP) —
Speed Grade 7 —
Temperature Grade Industrial (-40 °C to +100 °C) —
RoHS 狀態 Non-compliant (JESD-609 e0, contains lead) [DATA_NEEDED: RoHS status]
Manufacturer Status Obsolete (Intel/Altera legacy FPGA) —
Series — APEX 20KC
Logic Elements / Cells — 16640
Total System Gates — 400000
Embedded Memory (Bits) — 212992
Number of User I/O — 488
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Number of Logic Array Blocks — 1040
Core Voltage — 1.8 V
工作溫度範圍 — 0°C to +85°C (Commercial)
安裝類型 — Surface Mount
封裝 / 外殼 — 652-BGA
MSL 等級 — 3 (168 Hours)
Packaging — Tray
Programmability Type — In-system programmable (SRAM-based)
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL
JTAG (IEEE 1149.1) — Yes
PLL — Yes (4-phase)

資料表與資源

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