EP20K400CF672C7 vs EP20K400CF672C7N 比較
詳細並排比較 EP20K400CF672C7 由 Altera 與 EP20K400CF672C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400CF672C7 | EP20K400CF672C7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20KC | — |
| Family | APEX 20KC (MultiCore™) | APEX 20KC |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 | — |
| Embedded Memory (RAM bits) | 212,992 | — |
| Maximum User I/O | 488 | 488 |
| Number of I/O Banks | 8 | — |
| 封裝 | 672-BBGA (FC-FBGA, FineLine BGA) | 672-ball FineLine BGA (FC-FBGA / BBGA) |
| 腳位數 | 672 | — |
| Core Voltage | 1.8 V | — |
| 供應電壓 | 2.5 V (I/O reference) | — |
| Process Technology | 0.15 µm CMOS | 0.18-micron CMOS, all-layer copper interconnect |
| Propagation Delay (tPD) | 2.5 ns | — |
| Maximum Internal Frequency | 375.94 MHz | — |
| 工作溫度 | 0 °C to +85 °C (Commercial, C-grade) | 0 C to 85 C (Commercial) |
| PLL Count | 4 | — |
| Speed Grade | -7 | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS 狀態 | Non-compliant (legacy product) | [DATA_NEEDED: RoHS status not in provided data] |
| Lead-Free | Contains lead (legacy BGA finish) | — |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Embedded Memory | — | 488 Kbits |
| User I/O (per catalog) | — | 480 / 502 (per source) |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 3.3 V / 2.5 V banked |
| Propagation Delay | — | 2.5 ns (catalog) / 1.48 ns (some catalog) |
| Maximum Frequency | — | 375.94 MHz (internal) |
| MSL 等級 | — | 3 (per JEDEC J-STD-020) |
| Configuration Modes | — | PS, PPS, JTAG |