EP20K400CF672C9 vs EP20K400CF672I9 比較

詳細並排比較 EP20K400CF672C9 由 Altera 與 EP20K400CF672I9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CF672C9 EP20K400CF672I9
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX-20KC —
Logic Family / Architecture MultiCore (LUT + ESB) —
System Gates 400,000 400,000
Logic Cells / Elements 16,640 —
Maximum User I/Os 488 —
封裝 / 外殼 672-BBGA, FCBGA —
Supplier Device Package 672-FBGA (27x27 mm) —
Ball Pitch 1.0 mm —
Core Supply Voltage 2.5 V —
I/O Supply Voltage [DATA_NEEDED: I/O VCCIO range] —
Process Technology 0.22 um CMOS 0.15 µm CMOS
Internal Maximum Frequency 368 MHz —
Propagation Delay 2.5 ns —
工作溫度 0C to +85C (Commercial) -40°C to +85°C (Industrial)
Embedded Memory Embedded System Blocks (ESB) —
Configuration Method Serial / Parallel PROM —
RoHS 狀態 RoHS non-compliant (legacy) Non-compliant (e0 terminal finish indicates SnPb)
安裝類型 Surface Mount —
Family — APEX 20KC
Logic Elements — 16,640 cells
Maximum Operating Frequency — 250 MHz
Embedded RAM — 212,992 bits
Embedded System Blocks (ESBs) — 104
Maximum User I/O Pins — [DATA_NEEDED: max user I/O count]
Core Voltage — 1.8 V
I/O Voltage — 1.8 V / 3.3 V (MultiVolt)
封裝 — 672-ball FC-FBGA (FineLine BGA)
Package Pitch — 1.0 mm
Speed Grade — I9 (Industrial)
濕度敏感等級 (MSL) — 3
Terminal Finish — e0 (Tin-Lead, per JESD-609)

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