EP20K400GC655-2 vs EP20K400GC652-1XV 比較
詳細並排比較 EP20K400GC655-2 由 Altera 與 EP20K400GC652-1XV 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400GC655-2 | EP20K400GC652-1XV |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Total RAM Bits | 212,992 | — |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -2 | -1 (standard) |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | — |
| LVDS Support | Yes | — |
| PLLs | 4 | — |
| 腳位數 | 655 | — |
| Package Type | 655-BCPGA (CPGA-655) | BGA-652 (thermally enhanced) |
| Package Dimensions | 62.48 x 62.48 mm | — |
| 安裝類型 | Through-Hole (CPGA) | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0 C to +85 C |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free, V suffix) |
| Logic Elements (Macros) | — | 1664 |
| Typical System Gates | — | 400,000 |
| Maximum User I/O | — | 502 |
| Embedded SRAM | — | 212,992 bits |
| Propagation Delay | — | 2.5 ns |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore (LUT + EAB + FastTrack interconnect) |
| Programming Interface | — | JTAG (IEEE 1149.1) / passive serial |