EP20K400GC655-2V vs EP20K400GC655-2N 比較
詳細並排比較 EP20K400GC655-2V 由 Altera 與 EP20K400GC655-2N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400GC655-2V | EP20K400GC655-2N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Series | APEX-20KC | — |
| Family | APEX 20KC (1.8 V, LVDS) | APEX 20KC |
| Logic Elements | 16,640 | — |
| Total RAM Bits | 212,992 | 212992 |
| System Gates | ~400,000 (typical marketing figure) | — |
| Number of I/O | [DATA_NEEDED: I/O count] | [DATA_NEEDED: I/O count] |
| Core Voltage (VCCINT) | 2.375 V to 2.625 V (nominal 2.5 V) | 1.71 V to 1.89 V |
| Propagation Delay | 3.000 ns | — |
| Process Technology | CMOS, 0.18 um | 0.22 µm CMOS |
| LVDS Support | Yes | Yes |
| 封裝 | 655-CPGA (62.48 x 62.48 mm) | — |
| Package Type | Ceramic Pin Grid Array, through-hole | — |
| 安裝類型 | Through-hole (CPGA) | Through-Hole (CPGA, socket-compatible) |
| Speed Grade | -2 | — |
| 工作溫度 | [DATA_NEEDED: temperature grade] | Industrial (per Altera part-number -N suffix) |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | MultiCore (LUT + product-term + embedded memory) |
| Number of Logic Elements | — | 16640 |
| Number of Logic Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| I/O Voltage (VCCIO) | — | 2.5 V (LVDS-capable) |
| Maximum Operating Frequency | — | 200 MHz |
| Propagation Delay (Tpd) | — | 3.1 ns |
| 封裝 / 外殼 | — | 655-BCPGA (Ceramic Pin Grid Array) |
| Supplier Device Package | — | 655-CPGA, 62.48 x 62.48 mm |
| Configuration Method | — | JTAG / Passive Serial |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |