EP20K400GI655-1 vs EP20K400GC655-1X 比較

詳細並排比較 EP20K400GI655-1 由 Altera 與 EP20K400GC655-1X 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K400GC655-1X EP20K400GC655-1X - 400K-Gate APEX 20K FPGA | Altera

EP20K400GC655-1X - 400K-Gate APEX 20K FPGA | Altera

EP20K400GC655-1X Obsolete

規格比較

參數 EP20K400GI655-1 EP20K400GC655-1X
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20K —
Device Series EP20K400 —
Technology CMOS, SRAM-based CMOS
Logic Elements 16640 16640 cells
Typical Gates 400000 —
Maximum User I/O 502 —
Dedicated Inputs 4 —
Total Terminals 655 —
Propagation Delay 2.5 ns 2.5 ns
Package Type Ceramic Pin Grid Array (CPGA-655) CPGA-655 (Ceramic Pin Grid Array)
JESD-30 Package Code S-CPGA-P655 —
工作溫度 -40C to +85C (Industrial) —
Moisture Sensitivity Level MSL 1 —
Peak Reflow Temperature 220 C —
Programmability In-system, JTAG boundary-scan (IEEE 1149.1) —
Process Node 0.18 micrometer CMOS —
RoHS 狀態 Compliant unknown
Product Family — Altera APEX 20K
Device Type — Field Programmable Gate Array (FPGA)
Gate Count — 400K gates
Maximum System Frequency — 250 MHz
Core Supply Voltage — 2.5 V
I/O Supply Voltage — 2.5 V / 3.3 V
Number of User I/O — 496
Number of Dedicated Inputs — 6
Number of Terminals — 655
Package Body Material — Ceramic
Process Technology — 0.22 um
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
Embedded RAM Bits — [DATA_NEEDED: embedded RAM bits]

資料表與資源

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