EP20K600CF672-1X vs EP20K600CF672-3 比較

詳細並排比較 EP20K600CF672-1X 由 Intel 與 EP20K600CF672-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF672-1X EP20K600CF672-3
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Series APEX 20KC —
Device Family APEX 20KC MultiCore FPGA —
Maximum Typical Gates 600,000 —
Logic Elements 31,104 (per Altera APEX 20KC datasheet family) —
Embedded System Blocks (ESBs) up to 256 —
Embedded Memory (max bits) [DATA_NEEDED: ESB RAM bits] —
PLLs 4 4
Maximum User I/O [DATA_NEEDED: max user I/O count] —
封裝 672-ball BGA (CF672), 1.27 mm pitch 672-ball FineLine BGA
Speed Grade -1 (industrial speed grade, X = lead-free) -3
Process Technology 0.18 um SRAM CMOS 0.18 µm CMOS
Configuration Method SRAM, JTAG (IEEE 1149.1), EPC passive serial —
供應電壓 [DATA_NEEDED: VCCINT/VCCIO] —
工作溫度 [DATA_NEEDED: industrial temp range] [DATA_NEEDED: operating temperature range]
安裝類型 Surface Mount (BGA) Surface Mount
MSL 等級 [DATA_NEEDED: MSL rating] —
RoHS 狀態 Compliant (per Alibaba distributor listing: "RoHS Compliant") Lead-free / RoHS compliant (per Alibaba listing)
Family — APEX 20KC
Typical Gates — 600,000
Maximum System Gates — 2,432,000
Maximum Logic Elements — 2,432
Embedded System Memory — 311,040 bits (380 Kbits ESB)
User I/O Pins — 488
Maximum Internal Frequency — 180 MHz (per APEX 20K family datasheet)
Configuration Modes — PS, PPS, PPA, JTAG, EPC2/EPC16
I/O Standards Supported — LVTTL, LVCMOS, SSTL-2/3, HSTL, LVDS, PCI

資料表與資源

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