EP20K600CF672C7ES vs EP20K600CF672-2 比較

詳細並排比較 EP20K600CF672C7ES 由 Altera 與 EP20K600CF672-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K600CF672C7ES EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES ⚠ 最後購買機會

規格比較

參數 EP20K600CF672C7ES EP20K600CF672-2
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Series APEX 20KC APEX 20KC
Family APEX 20K —
Logic Elements / Cells 24320 —
System Gates 600000 —
Maximum User I/O 504 —
Maximum Input Lines 508 —
Number of Macrocells 504 —
Maximum Operating Frequency 375.94 MHz (per FPGAkey listing) —
Propagation Delay 1.6 ns —
Internal Reference Clock 1666.6 MHz —
Process Technology 0.15 µm CMOS 0.18 um CMOS
Core Supply Voltage (VCCINT) 1.8 V —
Package Type FC-FBGA 672-ball FineLine BGA (FCBGA)
Pin / Ball Count 672 —
Grade Suffix ES (engineering sample / extended screening) —
工作溫度 [DATA_NEEDED: operating temperature grade] 0 C to +60 C (TJ, per Alibaba supplier listing)
安裝類型 Surface Mount (BGA) Surface Mount
MSL 等級 [DATA_NEEDED: MSL rating] —
RoHS 狀態 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: rohs_status]
Configuration Memory SRAM-based (volatile) —
Manufacturer — Intel / Altera
Device Family — APEX 20KC PLD
Gate Count (typical) — 600,000 gates
Logic Elements — 30,720
Embedded RAM (approx.) — 311,232 bits
Speed Grade — -2
Configuration Mode — Enhanced Configuration (EPC)
Number of PLLs — 4
I/O Standards — LVTTL, LVCMOS, and others per datasheet
Boundary Scan — IEEE 1149.1 (JTAG)
生命週期狀態 — Obsolete / last-time-buy

資料表與資源

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