EP20K600CF672I7 vs EP20K600CF672I9 比較

詳細並排比較 EP20K600CF672I7 由 Altera 與 EP20K600CF672I9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF672I7 EP20K600CF672I9
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KC APEX 20KC
Maximum Logic Elements 24,320 cells —
System Gates 600,000 600,000
Maximum User I/O 508 —
Maximum Internal Frequency 375.94 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 3.3 V (LVTTL/LVCMOS compatible) —
Speed Grade -7 9 (fastest bin)
工作溫度 -40 °C to +100 °C (industrial, I-suffix) —
封裝 672-ball FineLine BGA (FC-FBGA, 27×27 mm) 672-pin FC-FBGA
Ball Pitch 1.00 mm —
Embedded System Blocks Yes (dual-port RAM / CAM) —
Configuration Interface IEEE 1149.1 JTAG, passive serial, fast passive parallel —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Logic Elements / Cells — 24,320
Maximum Operating Frequency — 250 MHz
Core Voltage — 1.8 V
Temperature Grade — Industrial (-40°C to +85°C)
User I/O Pins — 311 (max)
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count]
Embedded Memory — [DATA_NEEDED: total RAM bits]
PLLs — Up to 4
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS
Configuration Mode — Passive Serial / JTAG
Maximum Seated Height — 2.1 mm
MSL 等級 — [DATA_NEEDED: MSL level]
Lead-Free — [DATA_NEEDED: lead-free]

資料表與資源

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