EP20K60EFC324-3 vs EP20K60EFC324-2X 比較

詳細並排比較 EP20K60EFC324-3 由 Intel 與 EP20K60EFC324-2X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K60EFC324-3 EP20K60EFC324-2X
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX 20KE —
Family APEX 20K APEX-20KE
Logic Elements / Cells 2560 —
Total Gates 60000 —
User I/Os 196 —
Number of Logic Blocks / LABs 256 —
Embedded Memory (EAB/ESB) Bits 24576 —
Internal Frequency (max) 160 MHz —
Propagation Delay 1.72 ns —
Peak Performance Frequency 182 MHz —
Core Voltage (VCCINT) 1.8 V (1.71 V to 1.89 V) —
I/O Voltage (VCCIO) 3.3 V (3.0 V to 3.6 V) —
Process Technology 0.22 µm CMOS —
Logic Family CMOS —
封裝 / 外殼 324-FBGA (19x19 mm, 1.0 mm pitch) —
工作溫度 0°C to +85°C (commercial) —
安裝類型 Surface Mount —
Programmable Type In-system programmable (SRAM) —
Configuration Interface JTAG (IEEE 1149.1) + passive serial —
RoHS 狀態 unknown [DATA_NEEDED: RoHS compliance]
Number of Logic Elements (LEs) — 2,560
Typical Gates — 60,000
Total RAM Bits — 32,768
Number of I/O Pins — 196
Number of Embedded System Blocks (ESBs) — 16
Number of PLLs — 4
Core Voltage — 1.71 V to 1.89 V
MultiVolt I/O Support — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Package Type — 324-FBGA (Fine-pitch BGA)
Package Dimensions — 19 mm × 19 mm
Operating Temperature Grade — Industrial (per -2 speed suffix)
Configuration Mode — Passive Serial / Passive Parallel (Async & Sync)
In-System Programming — Yes (IEEE 1149.1 JTAG)

資料表與資源

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