EP2A40B724C8ES vs EP2A40B724C7 比較

詳細並排比較 EP2A40B724C8ES 由 Intel 與 EP2A40B724C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A40B724C8ES EP2A40B724C7
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX II (EP2A) —
Family Field Programmable Gate Array (FPGA) APEX II
Logic Elements / Cells 38,400 38,400
Number of Gates (typical) 655,360 —
Number of I/O 540 —
封裝 724-BBGA / FCBGA 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm
Speed Grade -8 (C8) —
工作溫度 [DATA_NEEDED: operating temperature range] 0 °C to +85 °C (commercial)
安裝類型 Surface Mount Surface Mount (BGA)
MSL 等級 [DATA_NEEDED: MSL moisture sensitivity level] [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS status] Non-compliant (lead-bearing FCBGA)
供應電壓 [DATA_NEEDED: VCCINT / VCCIO core and I/O voltages] —
Process Node [DATA_NEEDED: CMOS process technology] —
Embedded Memory Embedded System Blocks (ESB) —
Programmable Logic Type SRAM-based, in-system reconfigurable —
Lead-Free Status [DATA_NEEDED: lead-free status] —
Architecture MultiCore interconnect with LABs and ESBs —
Total System Gates — 1,500,000
Embedded RAM Bits — 655,360
Maximum User I/O — 540
Core Supply Voltage — 1.425 V to 1.575 V (typ. 1.5 V)
Process Technology — 0.15 µm CMOS, up to 8 metal layers, all-layer copper
Maximum Internal Frequency — 562 MHz
PLLs — 4
I/O Standards Supported — LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices
MultiVolt I/O Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V
DDR Memory Support — Yes (via ESB / I/O circuitry)

資料表與資源

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