EP2A70B724C7ES vs EP2A70B724C8N 比較

詳細並排比較 EP2A70B724C7ES 由 Altera 與 EP2A70B724C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

Altera

EP2A70B724C7ES - Altera APEX II FPGA 3M Gates 67200 Cells | Intel

EP2A70B724C7ES Nrnd

Altera

EP2A70B724C8N ⚠ 最後購買機會

參數	EP2A70B724C7ES	EP2A70B724C8N
品牌	Altera	Altera
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	NRND	最後購買
Family	APEX II	FPGA (PLD)
Typical Gates	3,000,000 (3M)	—
Logic Elements (Cells)	67,200	—
Maximum Operating Frequency	420 MHz	—
Process Technology	0.15 µm	0.15 um CMOS, SRAM-based
Core Voltage	1.5 V	—
封裝	724-pin FCBGA	—
User I/O Pins	540	—
Speed Grade	C7	—
Temperature Grade	Commercial (C)	—
記憶體類型	Embedded System Block (ESB)	—
PLLs	Up to 8	—
安裝類型	Surface Mount (BGA)	Surface Mount (BGA)
MSL 等級	[DATA_NEEDED: MSL level]	—
RoHS 狀態	[DATA_NEEDED: RoHS status]	—
Programming Interface	JTAG / ByteBlaster	—
Device Marking Suffix	ES (Engineering Sample)	—
Series	—	APEX II (EP2A70)
System Gates	—	3,000,000 (3 M)
Logic Elements / Cells	—	67,200
Macrocells	—	16
Product Terms	—	32
Propagation Delay	—	2.49 ns
Maximum Internal Clock Frequency	—	281 MHz
Maximum Clock Frequency (fMAX)	—	1694.91 MHz
Core Supply Voltage	—	1.5 V
Architecture	—	PLA-type / LUT-based
Package Type	—	FCBGA-724 (square)
Number of Pins / Balls	—	724
Terminal Pitch	—	1.270 mm
Maximum User I/O	—	536