EP2C35F484I6N vs EP2C35F484C7N 比較
詳細並排比較 EP2C35F484I6N 由 Intel 與 EP2C35F484C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2C35F484I6N | EP2C35F484C7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Logic Elements | 33,216 | — |
| Logic Array Blocks (LABs) | 2,100 | — |
| Total RAM Bits | 483,840 bits (483.84 Kbit on-chip) | — |
| Embedded 18x18 Multipliers | 35 (Cyclone II family maximum 150) | 35 |
| Phase-Locked Loops (PLLs) | 4 | — |
| Maximum User I/O Pins | 322 (package-dependent; FBGA-484 supports up to 322 user I/O) | — |
| 封裝 | 484-ball FBGA (Fine-Pitch BGA) | 484-ball FBGA (FineLine BGA) |
| Logic Family | CMOS | — |
| Core Supply Voltage | 1.2 V | — |
| 工作溫度範圍 | -40C to +85C (industrial) | — |
| Maximum Internal Clock Frequency | 402.5 MHz | — |
| Process Node | 90 nm TSMC CMOS | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS 狀態 | Compliant | Compliant (lead-free) |
| Configuration Method | Serial / Parallel (via Altera/Intel configuration device or JTAG) | — |
| Family | — | Cyclone II |
| Logic Elements (LEs) | — | 33,216 |
| Total Memory Bits | — | 483,840 bits |
| Embedded Memory (M4K blocks) | — | 105 |
| User I/O Pins | — | 322 |
| Process Technology | — | 90 nm CMOS, SRAM-based |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) |
| PLL Count | — | 4 |
| Global Clock Networks | — | 16 |
| Maximum User Frequency | — | 402 MHz (internal logic) |
| Configuration Modes | — | JTAG, Active Serial (AS), Passive Serial (PS), PPA |
| 工作溫度 | — | 0C to +85C (commercial, 'C7' suffix) |