EP2S15F672C3 vs EP2S15F672C5N 比較
詳細並排比較 EP2S15F672C3 由 Intel 與 EP2S15F672C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S15F672C3 | EP2S15F672C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 15,600 |
| Embedded Memory (bits) | 419,328 | 419,328 |
| DSP Blocks (18-bit multipliers) | 156 | — |
| Maximum User I/O | 366 | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | — |
| Maximum Internal Frequency | [DATA_NEEDED: max internal clock MHz] | 640 MHz |
| 封裝 | 672-ball FC-FBGA | 672-BBGA / FBGA-672 |
| 安裝類型 | Surface Mount | — |
| Operating Temperature Grade | Commercial (C3 suffix) | — |
| Speed Grade | C3 (third commercial speed bin) | -C5 |
| PLLs | [DATA_NEEDED: number of PLLs] | — |
| Global Clock Networks | [DATA_NEEDED: number of global clocks] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | RoHS Compliant |
| MSL 等級 | [DATA_NEEDED: moisture sensitivity level] | — |
| Series | — | Altera Stratix II |
| Logic Array Blocks (LABs) | — | 780 |
| Configurable Logic Blocks (CLBs) | — | 6,240 |
| User I/O Pins | — | 366 |
| Package Dimensions | — | 35 x 35 mm |
| Ball Pitch | — | 1.0 mm |
| 工作溫度 | — | 0C to +85C (commercial) |
| Lead-Free (Pb-Free) | — | Yes |