EP2S30F672I4 vs EP2S30F672C4N 比較

詳細並排比較 EP2S30F672I4 由 Intel 與 EP2S30F672C4N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S30F672I4 EP2S30F672C4N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Series Stratix II Stratix II
Manufacturer Intel (formerly Altera) —
Logic Elements 33880 33,880
Logic Array Blocks (LABs) 1694 —
Total RAM Bits 1369728 1,369,728
Number of I/O 500 500
DSP Blocks 12 (per datasheet, family range) —
Number of PLLs 6 —
Voltage - Supply 1.2 V core, separate I/O bank VCCIO —
工作溫度 -40C to +100C (Industrial) 0C to +85C (Commercial, C4 grade)
安裝類型 Surface Mount Surface Mount
封裝 / 外殼 672-BBGA, FCBGA (FBGA-672) —
Package Dimensions 35 x 35 mm —
Ball Pitch 1.0 mm —
Process Technology 90 nm CMOS 90 nm CMOS
Configuration JTAG, serial, parallel (Stratix II scheme) —
MSL 等級 3 (per JEDEC J-STD-020) 3 (168 hours)
RoHS 狀態 [DATA_NEEDED: confirm RoHS compliance on part label] [DATA_NEEDED: rohs status]
Number of LABs/CLBs — 1694
封裝 — 672-BBGA, FCBGA (FineLine BGA)
Core Voltage — 1.2 V
Maximum Internal Frequency — 711.24 MHz
Speed Grade — C4 (Commercial, internal performance bin 4)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Embedded Multipliers / DSP Blocks — [DATA_NEEDED: DSP block count]
Transceivers — N/A (Stratix II non-GX variant)
Configuration Method — Passive serial / Fast passive parallel / JTAG

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