EP2S60F67214N vs EP2S30F672I4 比較
詳細並排比較 EP2S60F67214N 由 Altera 與 EP2S30F672I4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S60F67214N | EP2S30F672I4 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix II | — |
| Logic Elements | 60,440 LE | 33880 |
| Total RAM Bits | 2,544,192 bit (2.5 Mbit) | 1369728 |
| DSP Blocks | 12 | 12 (per datasheet, family range) |
| Phase-Locked Loops (PLLs) | 4 | — |
| 封裝 | 672-ball FBGA (FineLine BGA) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade | I4 (industrial, fast) | — |
| 工作溫度 | -40C to +100C (industrial) | -40C to +100C (Industrial) |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | — |
| I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count for FBGA-672] | — |
| Configuration | SRAM-based, configured via bitstream | JTAG, serial, parallel (Stratix II scheme) |
| RoHS 狀態 | Lead-free / RoHS compliant | [DATA_NEEDED: confirm RoHS compliance on part label] |
| MSL 等級 | 3 (168 hours floor life) | 3 (per JEDEC J-STD-020) |
| Series | — | Stratix II |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Array Blocks (LABs) | — | 1694 |
| Number of I/O | — | 500 |
| Number of PLLs | — | 6 |
| Voltage - Supply | — | 1.2 V core, separate I/O bank VCCIO |
| 封裝 / 外殼 | — | 672-BBGA, FCBGA (FBGA-672) |
| Package Dimensions | — | 35 x 35 mm |
| Ball Pitch | — | 1.0 mm |