EP3SL50F484I4 vs EP3SE50F484I3N 比較

詳細並排比較 EP3SL50F484I4 由 Intel 與 EP3SE50F484I3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP3SL50F484I4 EP3SE50F484I3N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND NRND
Device Family Stratix III L —
Logic Elements (LE) 47,500 —
Logic Array Blocks (LABs) 1,900 —
Embedded Memory Bits 2,184,192 bits —
Maximum User I/O 296 296
Process Technology 65 nm CMOS 65 nm
Internal Frequency 800 MHz (max, per digchip datasheet summary) —
Core Supply Voltage 1.1 V —
封裝 484-ball FC-FBGA (FCBGA, 1.0 mm pitch) 484-pin FC-FBGA (flip-chip BGA)
工作溫度 -40C to +100C (industrial) -40C to +100C (industrial)
Grade Suffix I4 = Industrial, speed grade 4 —
Configuration Modes JTAG, Passive Serial, FPP, PPA —
MultiTrack Interconnect Yes —
TriMatrix Embedded Memory MLAB, M9K, M144K blocks —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等級 3 (168 hours) —
RoHS 狀態 Compliant —
Lead-Free Yes —
Family — Stratix III E
Logic Elements — 47,500
Number of LABs — 1,900
Total Memory Bits — 5,760,000
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Core Voltage VCC — 0.9 V
Auxiliary Voltage VCCAUX — 1.1 V
Maximum Internal Frequency — 500 MHz
Speed Grade — I3 (industrial, bin 3)
Lead-Free / RoHS — Yes (N suffix)
Configuration Method — Active serial (AS), passive serial (PS), JTAG, fast passive parallel (FPP)
DSP Blocks — [DATA_NEEDED: number of DSP blocks]
Embedded Multipliers (18x18) — [DATA_NEEDED: number of 18x18 multipliers]
Transceiver Count — [DATA_NEEDED: number of embedded transceivers]

資料表與資源

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