EP610LI-35 vs EP610LC-35 比較

詳細並排比較 EP610LI-35 由 Altera 與 EP610LC-35 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP610LI-35 EP610LC-35
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Classic EPLD Altera Classic EPLD
Series EP610 —
Number of Macrocells 16 —
Usable Gates 300 300
Number of I/O Pins 16 —
Total Inputs 20 —
Dedicated Inputs 4 —
External Clock Inputs 2 —
Product Terms 160 —
Maximum Propagation Delay 35 ns (tpd) —
Maximum Operating Frequency 28.6 MHz (fmax) —
Pipelined Data Rate Up to 100 MHz —
供應電壓 5 V —
Process Technology CMOS —
Architecture PAL-type (AND-OR array) —
封裝 28-pin PLCC (windowed ceramic, 'LI') 28-pin PLCC (J-lead)
工作溫度範圍 [DATA_NEEDED: military/industrial operating temperature range] —
Programming Technology UV-erasable (EPROM) —
安裝類型 Surface Mount Surface Mount
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: rohs_status]
Device Series — EP610
Macrocells — 16
Propagation Delay (tpd) — 37 ns
Supply Voltage (Vcc) — 5 V
Technology — CMOS EEPROM (one-time-programmable plastic)
工作溫度 — Commercial (0C to +70C) [DATA_NEEDED: exact grade letter]
Speed Grade — -35 (slowest EP610)
Programmable Pins — 24 input / 16 output (shared macrocells)
Lead-Free — [DATA_NEEDED: lead_free]
MSL 等級 — [DATA_NEEDED: msl_level]
Programming Tool — MAX+PLUS II development system

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