EP910LC-25 vs EP910LC-32 比較

詳細並排比較 EP910LC-25 由 Intel 與 EP910LC-32 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP910LC-25 EP910LC-32
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Altera Classic EPLD —
Macrocells 24 —
Logic Gates [DATA_NEEDED: logic gate count] —
Propagation Delay (tPD) 25 ns —
Dedicated Inputs 16 —
封裝 28-pin PLCC (LC suffix) PLCC-32
安裝類型 Surface Mount Surface Mount (PLCC socket or direct solder)
Technology CMOS (EPROM-based) —
Operating Voltage [DATA_NEEDED: VCC range] —
工作溫度 0C to +70C (commercial) —
Programmable Yes (EPROM, UV-erasable on windowed variants) —
I/O Pins [DATA_NEEDED: I/O count] —
RoHS 狀態 [DATA_NEEDED: RoHS status] unknown
Lead-Free [DATA_NEEDED: lead-free status] —
Maximum Frequency [DATA_NEEDED: fMAX] —
Device Family — Altera Classic EPLD
Number of Macrocells — 24
Number of Usable Gates — 900 gates (typical)
Number of Dedicated Inputs — 10
Number of I/O Pins — 20
Speed Grade — -32
Maximum Toggle Frequency (fMAX) — [DATA_NEEDED: fMAX value in MHz for -32 grade]
Pin-to-Pin Propagation Delay (tPD) — [DATA_NEEDED: tPD in ns for -32 grade]
Supply Voltage (VCC) — 5 V
Logic Family — Low-power CMOS (LC suffix)
Programming Method — UV-erasable or one-time programmable (OTP for LC windowless variant)
工作溫度範圍 — [DATA_NEEDED: commercial or industrial grade]
I/O Standard — TTL-compatible
MSL 等級 — unknown

資料表與資源

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