EP910LI-15 vs EP910IPC-15 比較
詳細並排比較 EP910LI-15 由 Altera 與 EP910IPC-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LI-15 | EP910IPC-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Product Type | Programmable Logic Device (PLD) | Erasable Programmable Logic Device (EPLD) |
| Device Family | Altera Classic EPLD | Altera Classic EPLD (EP910 series) |
| Part Number | EP910LI-15 | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Dedicated Inputs | 12 | 12 |
| Input/Output Lines | 24 | — |
| Total User-Signal Resources | 36 | — |
| Speed Grade | 15 ns | — |
| 工作溫度範圍 | -40 °C to +85 °C | — |
| Technology | CMOS | — |
| 封裝 | 44-terminal J-lead ceramic chip carrier (PQCC44) | PDIP-40 (Plastic DIP, 40-pin) |
| Package Pin Count | 44 terminals | — |
| Package Mounting | Surface Mount | — |
| Dielectric/Construction | Ceramic | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: rohs status not confirmed in verified data] |
| REACH Status | unknown | — |
| AEC-Q100 Status | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Conflict Minerals Status | unknown | — |
| Architecture | — | PAL-type, CMOS |
| Macrocells | — | 24 |
| I/O Pins | — | 24 |
| Product Terms | — | 240 |
| External Clocks | — | 2 |
| Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| 工作溫度 | — | 0C to +70C (commercial, IPC suffix) |
| 安裝類型 | — | Through-Hole |
| Process Technology | — | CMOS |
| Programming Method | — | JEDEC fuse map via Altera EPLD programmer |
| 腳位數 | — | 40 |