EP910LI-40 vs EP910LC-40 比較
詳細並排比較 EP910LI-40 由 Altera 與 EP910LC-40 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete規格比較
| 參數 | EP910LI-40 | EP910LC-40 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel PSG) | Rochester Electronics (Altera original) |
| Product Family | Classic EPLD - EP910 series | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 4 |
| I/O Pins | 24 bidirectional | — |
| Maximum Logic Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Technology | Low-power CMOS (L-suffix) | CMOS EPROM |
| 工作溫度 | -40C to +85C (industrial, I-suffix) | — |
| 封裝 | PLCC-44 (J-lead, windowed ceramic) | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| 安裝類型 | Surface Mount (socket-compatible) | — |
| Programmability | UV-erasable, JEDEC-standard algorithm | — |
| RoHS 狀態 | Non-compliant (windowed ceramic PLCC, legacy) | Not applicable (legacy) |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | — |
| Device Family | — | Altera Classic EPLD - EP910 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Programming Method | — | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Lead-Free Status | — | Not applicable |