EP910PI-25 vs EP910PC-30 比較
詳細並排比較 EP910PI-25 由 Intel 與 EP910PC-30 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910PI-25 | EP910PC-30 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | 12 bidirectional |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | 30 ns |
| Maximum Clock Frequency (fMAX) | 40 MHz | — |
| Supply Voltage (VCC) | 5 V nominal | 5 V ±10% |
| Process Technology | 5 V CMOS (EPROM-based) | — |
| 封裝 | PDIP-40 (Plastic DIP) | PDIP-40 (plastic DIP, 0.6 inch) |
| 腳位數 | 40 | — |
| 安裝類型 | Through-Hole | Through-hole DIP |
| 工作溫度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmability | UV-erasable (windowed) / one-time-programmable | — |
| RoHS 狀態 | Non-compliant (PDIP package) | Non-compliant (contains lead, PDIP package) |
| Usable Gates | — | ~450 |
| Maximum Counter Frequency (fCNT) | — | 33.3 MHz |
| Logic Inputs | — | 36 dedicated |
| Logic Array Blocks (LABs) | — | 4 |
| Programming Technology | — | UV-erasable EPROM cell |
| TTL Emulation | — | 100% TTL-compatible |
| Power Dissipation | — | [DATA_NEEDED: power dissipation mW] |