EPC144ILC-20 vs EPC1441LC20N 比較

詳細並排比較 EPC144ILC-20 由 Altera 與 EPC1441LC20N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPC144ILC-20 EPC144ILC-20 - 440kb OTP Configuration PROM | Altera | PLCC-20

EPC144ILC-20 - 440kb OTP Configuration PROM | Altera | PLCC-20

EPC144ILC-20 ⚠ 最後購買機會

規格比較

參數 EPC144ILC-20 EPC1441LC20N
品牌 Altera Intel
類別 Memory ICs Memory ICs
生命週期狀態 最後購買 Obsolete
記憶體類型 OTP Configuration PROM (one-time programmable) OTP EPROM (One-Time Programmable)
記憶體容量 440 kb (kilobits) 440 Kbit
Configuration Interface Serial (Altera proprietary PS mode) —
供應電壓 5.0 V (typical) 3.3 V (typical)
Standby Current < 50 uA (CMOS standby) —
Programmable No (factory-programmed by Altera or distributor) —
封裝 20-pin PLCC (J-lead) 20-PLCC (J-Lead, 9 x 9 mm)
工作溫度 [DATA_NEEDED: operating temperature range] 0 C to +70 C (commercial)
Compatible FPGA Families Cyclone, ACEX 1K, APEX 20K, MAX 7000-series —
Configuration Mode Support PS (passive serial) and FPP (fast passive parallel) —
JTAG Interface Not present —
End-of-Life Status Last-time-buy (per Altera product change notifications) —
Lead-Free / RoHS Depends on date code; non-RoHS vintage stock common —
Programming Method Altera dedicated PROM programmer hardware —
Data Retention Permanent (anti-fuse OTP cell, no retention concern) —
腳位數 20 —
安裝類型 Surface Mount (PLCC J-lead) Surface Mount (PLCC socket compatible)
組織 — 55 K x 8 bit
介面 — Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF)
Configuration Clock (DCLK) — 8 MHz maximum
Programming Interface — JTAG (IEEE 1149.1) / Altera Programming Unit
Supported FPGA Families — ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Cascadable — Yes (nCS daisy-chain)
RoHS 狀態 — [DATA_NEEDED: RoHS status]
MSL 等級 — [DATA_NEEDED: MSL level]
Lead-Free — [DATA_NEEDED: lead-free status]

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