EPC16QC-100T vs EPC8QC100 比較

詳細並排比較 EPC16QC-100T 由 Altera 與 EPC8QC100 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC16QC-100T EPC8QC100
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete Obsolete
記憶體類型 Flash Configuration PROM (in-system programmable) Configuration PROM (Flash-based)
Memory Density 16 Mbit (2 Mbyte) —
Supported FPGA Families Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K —
Configuration Data Width 8-bit or 16-bit (cascaded dual-device mode) —
Configuration Modes Serial (single device), Parallel (two cascaded devices) —
Data Compression Support Yes (35% to 55% bitstream reduction typical) —
JTAG / Boundary Scan IEEE 1149.1 compliant, in-system programmable —
供應電壓 3.3 V 3.3 V
封裝 100-pin PQFP (20 x 14 mm), 0.65 mm pitch 100-Pin PQFP (20 x 14 mm)
工作溫度 [DATA_NEEDED: Operating temperature range] 0C to +70C (Commercial)
Cascade Interface nCE / nOE handshake for multi-device chains —
Programming Interface JTAG (IEEE 1149.1) and serial —
Endurance [DATA_NEEDED: Program/erase cycle rating] —
Data Retention [DATA_NEEDED: Data retention specification] —
RoHS 狀態 unknown [DATA_NEEDED: RoHS compliance]
Lead-Free unknown —
MSL 等級 [DATA_NEEDED: Moisture sensitivity level] —
安裝類型 Surface Mount Surface Mount
記憶體容量 — 8 Mbit
Flash Access Time — 90 ns (~10 MHz)
Configuration Bus Width — 16-bit (DQ[])
Configuration Bandwidth — Up to 160 Mbps
Decompression Support — Yes (Altera proprietary)
Supported Configuration Modes — FPP, PS, AS (FPGA-dependent)
ISP Interface — JTAG (IEEE 1149.1)
Compatible FPGA Families — Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
Lead Free — [DATA_NEEDED: lead-free status]

資料表與資源

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