EPC16UC88 vs EPC16U188N 比較
詳細並排比較 EPC16UC88 由 Altera 與 EPC16U188N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC16UC88 | EPC16U188N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | Unknown | 啟用中 |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| 供應電壓 | 3.3 V core and I/O | — |
| 封裝 | 88-UBGA (11x8) | 188-ball Ultra FineLine BGA (UBGA) |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | — |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| 安裝類型 | Surface mount | Surface Mount (BGA) |
| Package Dimensions | 11 mm x 8 mm | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature] | -40C to +85C |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| 記憶體類型 | — | In-System Programmable Configuration PROM |
| Memory Density | — | 16 Mbit |
| FPGA Family Support | — | Altera Cyclone, Stratix, APEX series |
| Configuration Modes | — | FPP, PS, AS, JTAG |
| Decompression | — | Built-in (multiplier 1x, 2x, 4x) |
| 介面 | — | Parallel Flash Interface (PIA), JTAG (IEEE 1149.1) |
| I/O Voltage Support | — | 1.8V, 2.5V, 3.3V, 5.0V |
| Endurance | — | 100,000 erase/program cycles |
| Data Retention | — | 20 years |
| Programming Interface | — | IEEE 1149.1 JTAG |
| MSL 等級 | — | 3 (168 hours) |