EPC2L120N vs EPC2L20U-HAF480119C 比較

詳細並排比較 EPC2L120N 由 Intel 與 EPC2L20U-HAF480119C 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPC2L20U-HAF480119C EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel

EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel

EPC2L20U-HAF480119C ⚠ 最後購買機會

規格比較

參數 EPC2L120N EPC2L20U-HAF480119C
品牌 Intel Intel
類別 FPGA & CPLD Memory ICs
生命週期狀態 Obsolete 最後購買
Device Type Configuration Device for SRAM-based LUT FPGAs —
Manufacturer Intel (formerly Altera) —
Family EPC2 (Enhanced Configuration Device) —
Memory Capacity 165,888 bits (400,000 gates equivalent) —
Operating Voltage (VCCIO) 2.7 V to 3.6 V —
5V Tolerance Yes (5V-tolerant I/O) —
Configuration Clock (FPP) Up to 66 MHz —
Configuration Clock (PS) Up to 33 MHz —
Internal Oscillator 8 MHz with programmable divider —
JTAG Interface IEEE Std 1149.1 compliant, ISP support —
Programming Cycles 100,000 erase/program cycles —
Sector Erase Time [DATA_NEEDED: typical sector erase time] —
封裝 84-pin PLCC (J-Lead) PLCC-20
Configuration Schemes FPP, PS, JTAG, daisy chain —
工作溫度 [DATA_NEEDED: industrial temp range] —
Supported FPGA Families Cyclone, APEX, FLEX, Mercury, ACEX, Stratix —
RoHS 狀態 unknown [DATA_NEEDED: RoHS status]
記憶體類型 — Configuration PROM (non-volatile)
記憶體容量 — 1.6 Mb
Target Device — SRAM-based LUT FPGAs (Cyclone, Stratix, APEX families)
Core Supply Voltage — 3.3 V
I/O Tolerance — 5 V tolerant
Configuration Modes — Serial (1-bit), Parallel (8-bit FPP), JTAG
JTAG Support — Yes (IEEE 1149.1 boundary-scan)
Programmability — In-system programmable via JTAG
Cascade Support — Yes (multi-PROM chains for larger FPGAs)
Configuration Clock Range — 10 MHz to 40 MHz
Bitstream Compression Support — Yes (Cyclone/Stratix compressed bitstreams)
安裝類型 — Surface Mount / Socketed
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
Lead-Free — [DATA_NEEDED: lead-free status]

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