EPC448PC-20 vs EPC448PC-45A 比較

詳細並排比較 EPC448PC-20 由 Altera 與 EPC448PC-45A 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPC448PC-45A EPC448PC-45A - Altera Enhanced Configuration Device | PDIP

EPC448PC-45A - Altera Enhanced Configuration Device | PDIP

EPC448PC-45A ⚠ 最後購買機會

規格比較

參數 EPC448PC-20 EPC448PC-45A
品牌 Altera Altera
類別 Memory ICs FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Device Family Enhanced Configuration Device (EPC) —
Memory Density 4 Mbit (4,194,304 bits) 4 Mbit (448 Kbit)
Speed Grade -20 -45A
Supply Voltage (VCC) 3.3 V 3.0 V to 3.6 V (3.3 V typical)
Configuration Clock (Max) 20 MHz —
Interface to FPGA Dedicated Altera/Intel configuration serial (Active Serial) —
Programming Interface JTAG (IEEE 1149.1) ISP —
封裝 20-ball PC-BGA —
安裝類型 Surface Mount Through-hole (DIP)
工作溫度 [DATA_NEEDED: operating temperature range] -40 C to +85 C (industrial)
Configuration Time (typical 4 Mbit) Approx. 200 ms at 20 MHz —
Supported FPGA Series APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II —
Compression Supported (1.5x to 2x depending on bitstream) —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status from official datasheet]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free finish status]
Device Type — Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs
Maximum Access Time — 45 ns
Package Type — Plastic DIP (PDIP-20), 300-mil body
腳位數 — 20
I/O Voltage Compatibility — 1.8 V, 2.5 V, 3.3 V downstream FPGA
Configuration Interface — Altera Passive Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF)
Programming Technology — EEPROM cell with internal charge pump
Configuration Support — Altera Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur FPGAs
MSL 等級 — Not applicable (through-hole package)

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