EPM3032ALC44-4 vs EPM3032ALC44-4N 比較
詳細並排比較 EPM3032ALC44-4 由 Altera 與 EPM3032ALC44-4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3032ALC44-4 | EPM3032ALC44-4N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | 2 |
| User I/O Pins | 34 | 34 |
| Pin-to-Pin Delay (tPD) | 4.5 ns | 4.5 ns |
| Maximum Counter Frequency | 227.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt: 5.0 V / 3.3 V / 2.5 V compatible) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Usable Gates | 600 to 10,000 (MAX 3000A family range) | 600 |
| 封裝 | 44-pin PLCC (J-Lead) | 44-pin PLCC (J-Lead) |
| 工作溫度 | 0°C to +70°C (Commercial) | [DATA_NEEDED: industrial/commercial grade] |
| Technology | CMOS EEPROM-based | — |
| In-System Programmability (ISP) | Yes, IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | — |
| Programming Interface | JTAG (ByteBlaster / MasterBlaster) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: from datasheet] |
| 安裝類型 | Surface Mount (PLCC J-Lead) | Surface Mount |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum Counter Frequency (fCNT) | — | 227.3 MHz |
| Programmability | — | EEPROM (non-volatile), IEEE 1149.1 JTAG ISP, IEEE 1532 compliant |