EPM3064ALC44-10N vs EPM3064ATC44-10 比較
詳細並排比較 EPM3064ALC44-10N 由 Altera 與 EPM3064ATC44-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM3064ALC44-10N - MAX 3000A CPLD, 64 Macrocells, 34 I/O | Intel / Altera
EPM3064ALC44-10N Obsolete
規格比較
| 參數 | EPM3064ALC44-10N | EPM3064ATC44-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O Pins | 34 | — |
| Usable Gates | 1,250 | 1,250 |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Bank Voltage (VCCIO) | 3.0 V to 3.6 V (MultiVolt) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Configuration Memory | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, IEEE 1532 compliant) | — |
| 封裝 | 44-pin PLCC (LC44) | TQFP-44, 10 x 10 mm, 0.8 mm pitch |
| 安裝類型 | Surface Mount (PLCC socket compatible) | Surface Mount |
| 工作溫度 | [DATA_NEEDED: commercial / industrial grade] | — |
| RoHS 狀態 | Compliant | Non-compliant (legacy Altera, Pb-bearing) |
| Open-Drain Output Option | Yes (per I/O pin) | — |
| Output Slew-Rate Control | Programmable | — |
| Family | — | MAX 3000A |
| Logic Elements / Macrocells | — | 64 macrocells |
| Number of Logic Blocks / LABs | — | 4 LABs |
| Maximum Internal Frequency | — | 227.3 MHz (counter speed) |
| Programmable I/Os | — | 34 |
| Technology | — | CMOS EEPROM, 5 V tolerant I/O |
| In-System Programming | — | IEEE Std. 1532 (JTAG) |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |
| 工作溫度範圍 | — | 0C to +70C (commercial) |