EPM3128ATI144-5N vs EPM3128ATC144-5N 比較
詳細並排比較 EPM3128ATI144-5N 由 Altera 與 EPM3128ATC144-5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3128ATI144-5N | EPM3128ATC144-5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 最後購買 |
| Family | MAX 3000A | MAX 3000A |
| Logic Gates | 2,500 gates | — |
| Macro Cells | 128 | — |
| User I/Os | 96 | — |
| Maximum Operating Frequency | 192.3 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 5.0 ns | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| I/O Standard | LVCMOS / LVTTL (5.0 V tolerant inputs) | — |
| Programming Interface | JTAG (IEEE 1149.1 BST) - in-system | — |
| Process Technology | 0.30 um CMOS EEPROM | — |
| Configuration Memory | Non-volatile on-chip EEPROM | — |
| 封裝 | TQFP-144 (20x20 mm, 0.5 mm pitch) | 144-pin TQFP (20x20 mm) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +85C (industrial) | 0C to 70C (Commercial) |
| MSL 等級 | 3 (168 hours) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Logic Family | — | CMOS |
| Macrocells | — | 128 |
| Usable Gates | — | 2500 |
| User I/O | — | 96 |
| Pin-to-Pin Logic Delay | — | 5 ns |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Levels Supported | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | — | Yes (3.3-V via JTAG) |
| JTAG Boundary Scan | — | IEEE Std 1149.1 compliant |