EPM3128ATI144-5N vs EPM3128ATC144-5N Perbandingan

Perbandingan bersamaan detil EPM3128ATI144-5N dari Altera dan EPM3128ATC144-5N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM3128ATC144-5N EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM3128ATI144-5N EPM3128ATC144-5N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Waktu Pembelian Terakhir
Family MAX 3000A MAX 3000A
Logic Gates 2,500 gates —
Macro Cells 128 —
User I/Os 96 —
Maximum Operating Frequency 192.3 MHz —
Pin-to-Pin Propagation Delay (tPD) 5.0 ns —
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) —
I/O Standard LVCMOS / LVTTL (5.0 V tolerant inputs) —
Programming Interface JTAG (IEEE 1149.1 BST) - in-system —
Process Technology 0.30 um CMOS EEPROM —
Configuration Memory Non-volatile on-chip EEPROM —
Paket TQFP-144 (20x20 mm, 0.5 mm pitch) 144-pin TQFP (20x20 mm)
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja -40C to +85C (industrial) 0C to 70C (Commercial)
Level MSL 3 (168 hours) —
Status RoHS [DATA_NEEDED: RoHS status] Compliant (lead-free)
Lead-Free [DATA_NEEDED: lead-free status] —
Device Type — CPLD - Complex Programmable Logic Device
Logic Family — CMOS
Macrocells — 128
Usable Gates — 2500
User I/O — 96
Pin-to-Pin Logic Delay — 5 ns
Counter Frequency — up to 227.3 MHz
Supply Voltage (Core) — 3.3 V
I/O Logic Levels Supported — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
In-System Programmability — Yes (3.3-V via JTAG)
JTAG Boundary Scan — IEEE Std 1149.1 compliant

Spek dan Sumber

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